Patent attributes
A copy engine (104) is provided as an interface between firmware (108) and memory space (106) for carrying out copy operations. The copy engine has a first register (202, 203) to point to a first address and a second register (204, 205) to point to a second address. One of the first and second addresses is a source address and one is a destination address for data to be copied. The copy engine (104) also has a control register (201). The control register (201) includes a count of the amount of memory space required by a copy operation, an indication of the direction of the copy operation from the first address to the second address or from the second address to the first address, and an indication of whether the first memory address is incremented or decremented. The copy engine (104) includes a locking mechanism for locking the copy engine (104) during a copy operation. The copy engine (104) also includes a serialisation mechanism in which a write is made to the control register (201) of zero count. If the copy engine (104) is locked, the write of zero count is retried until the existing copy operation has completed and then it will complete with no effect.
