A content addressable memory (CAM) device can include a plurality CAM cell groups. The CAM cells of each group can be commonly connected to at least one local compare data line. A mask value circuit can be provided corresponding to each CAM cell group. Each mask value circuit can provide a mask value. At least a first logic circuit corresponding to each CAM cell group can have a first input coupled to at least a first global compare data line, a second input coupled to receive the mask value of the corresponding mask value circuit, and an output coupled to the corresponding at least first local compare data line.