Patent attributes
A sampling rate converting circuit receives plural pieces of input data having different sampling frequencies. A plurality of FIR circuits is shared to reduce a circuit area, and, in a case where a magnification ratio of an input frequency and an output frequency is not an integer, signal deterioration due to resampling is solved. An oversampling component performs oversampling on input data Fs1 and outputs output data Fs′. An input timing timer calculates an input/input time based on an input timing signal CK1. An output timing timer and an accumulator calculate an input/output time based on an output timing signal CK′ and the input timing signal CK1 and multiplies the input/output time by an oversampling multiple W to obtain a multiplied result. A divider divides the multiplied result by the input/input time to obtain a sampling position. A coefficient generator generates a filter coefficient based on the sampling position and supplies the filter coefficient to a multiplier.
