Patent attributes
A driving circuit of a liquid crystal display is provided. The driving circuit comprises: a plurality of gate drivers for selectively driving a plurality of thin film transistors of the liquid crystal display; a plurality of source drivers for receiving an image signal, the plurality of source drivers cooperating with the plurality of gate drivers to display an image on the liquid crystal display, each of the plurality of source drivers further comprising an adjustable common voltage generating circuit, each the adjustable common voltage generating circuit compensating, a common voltage output from each the adjustable common voltage generating circuit to make each the common voltage output from each the adjustable common voltage generating circuit the same or to make each the common voltage output to an ITO layer of a panel of the liquid crystal display the same, based on a common voltage adjustable data and a clock signal; and a timing sequence controller for providing a control signal and a data flow to the plurality of gate drivers and the plurality of source drivers and providing the common voltage adjustable data to each the adjustable common voltage generating circuit.
