Patent attributes
Source diffusion layers and drain diffusion layers are alternately formed in lateral device forming regions separated by device isolation regions. Control gate electrodes are formed on both sides of each source diffusion layer through gate ONO films interposed therebetween. Gate electrodes are formed over their corresponding side surfaces of the control gate electrodes through inter-gate electrode insulating films interposed therebetween respectively. The control gate electrodes and the gate electrodes are respectively connected in a vertical direction by a source line and word lines on each device isolation region. Further, an intermediate insulating film is formed over the surface of a silicon substrate formed with memory cells, and each lateral drain diffusion layer is connected to a bit line through contacts.
