Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Edward E. Kelley0
Paul V. Motika0
Franco Motika0
Eric M. Motika0
Date of Patent
June 10, 2008
0Patent Application Number
113814360
Date Filed
May 3, 2006
0Patent Primary Examiner
Patent abstract
Logic scan based design and electronic fuse (e-fuse) technology are combined to create a circuit macro function that is integrated in a non-critical area of a processor chip or related circuit to provide a new means of securing electronic systems and devices such as computers, appliances, consumer electronics, automobiles, etc. from theft or unauthorized use. Level sensitive scan design (LSSD) techniques are used in conjunction with e-fuses to inhibit or enable system components and sub-components based upon a pre-initialized configuration which must be enabled by a user via password entry.
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