US Patent 7385445 High efficiency amplifier circuits having bypass paths

Described herein are representative embodiments of amplifier bypass paths and amplifiers using such bypass paths. In certain exemplary embodiments, the amplifiers are operated as linear power amplifiers, such as may be used in wireless communications systems. According to one exemplary embodiment, an amplifier circuit is described comprising an amplifier path coupled between a first node and a second node. The amplifier path comprises one or more amplifiers. The circuit further comprises a bypass path coupled between the first node and the second node. The bypass path comprises two impedance inverting networks and a ground path that is selectively coupled to the bypass path at a third node located between the two impedance inverting networks. In this embodiment, the third node is configured to remain coupled to the two impedance inverting networks when the ground path is coupled to the bypass path.