US Patent 7385434 Circuit for preventing latch-up in DC-DC converter

Patent 7385434 was granted and assigned to MagnaChip Semiconductor on June, 2008 by the United States Patent and Trademark Office.

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Is a

Patent

Patent attributes

Current Assignee

MagnaChip Semiconductor

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

73854340

Patent Inventor Names

Chung-Heon Lee0

Date of Patent

June 10, 2008

Patent Application Number

113219520

Date Filed

December 28, 2005

Patent Primary Examiner

‌

Bao Q. Vu

Patent abstract

There is provided a circuit for preventing latch-up in a DC-DC. The circuit for preventing a latch-up phenomenon in a DC-DC converter, the DC-DC converter having a first and a second DC-DC converters coupled with each other in one chip for receiving an input voltage to generate a positive voltage and a negative voltage, respectively, in which a parasitic block with a PNP transistor and an NPN transistor causing a latch-up phenomenon is embedded, the circuit includes a first pathway for controlling an input current flowing to the first DC-DC converter from an input terminal receiving the input voltage in order that the PNP transistor is turned on and the NPN transistor is not turned on; and a second pathway for supplying the input current to the first DC-DC converter intactly at a timing that both the positive and negative voltages reach target voltages.