Patent attributes
A method of fabricating BEOL interconnect structures on a semiconductor device having a plurality of via contacts with low via contact resistance is provided. The method includes the steps of: a) forming a porous or dense low k dielectric layer on a substrate; b) forming single or dual damascene etched openings in the low k dielectric; c) placing the substrate in a process chamber on a cold chuck at a temperature about −200° C. to about 25° C.; d) adding to the process chamber a condensable cleaning agent (CCA) to condense a layer of CCA within the etched openings on the substrate; and e) performing an activation step while the wafer remains cold at a temperature of about −200° C. to about 25° C. The via contacts are very stable during thermal cycles and during operation of the semiconductor device.
