Patent attributes
An n-type semiconductor substrate 11 has a p-type well 12 in which are formed a charge transfer channel 13, a flowing diffusion region 14 made of an n-type impurity region, an n-type buried region 16 and a reset drain region 15. Transfer gates 51 and 52 of a horizontal CCD and an output gate 41 are formed on the surface of the charge transfer channel 13, with an insulation film 20 interposed; reset electrodes 31 and 32 are formed on the surface of the buried region 16, again with the insulation film 20 interposed. The floating diffusion region 14 is connected to a source follower circuit 6. The reset electrodes 31 and 32 are provided adjacent to each other in the channel direction of a reset gate section 3 and can be driven independently of each other.
