Patent attributes
A method for determining polynomials to model circuit delay includes the step of determining one or more error areas in a characteristic map that exceed an error margin. Next, a current domain count is set to zero and selecting one error area of the one or more error areas is selected. A patch region that will contain the error area determined the patch region is then curve fitted and the current domain count is increased by one. The steps of repeating steps of selecting an error area, determine a patch, curve fitting within the patch, and increasing the domain count by one are repeated until there are no error area within the patch region. Then a previous domain region having the largest domain count and at last one error area is curve fitted without using data points in any of the domain regions greater than the previous domain region if the previous domain region contains at least one error area, repeating steps of selecting an error area, determine a patch, curve fitting within the patch, and increasing the domain count by one. Then, a domain region having at least one error area is selected as the previous domain region. The steps of curve fitting a previous domain level having at least one error area is repeated for all domain regions less than the previous domain region that has at least one error areas, until all error areas are removed from all domain regions. Additionally, the method can include using a nth order polynomial for curve fitting and associating the polynomial with the current domain region.
