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US Patent 7352033 Twin MONOS array for high speed application

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Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
0
Patent Number
73520330
Patent Inventor Names
Ki-Tae Park0
Nori Ogura0
Tomoko Ogura0
Yoshitaka Baba0
Kimihiro Satoh0
Date of Patent
April 1, 2008
0
Patent Application Number
112155280
Date Filed
August 30, 2005
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Patent Primary Examiner
‌
Long Pham
0
Patent abstract

The invention provides a metal bit structure of Twin MONOS memory cell with large channel width and its operational method for high-speed applications using a metal bit array.

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