A compact electrostatic-breakdown-preventive and protective circuit for a semiconductor-device capable of performing high-speed operations includes first and second protective transistors. The distance from a contact hole for connecting an impurity diffusion layer serving as a source and a drain of each of the first and second protective transistors with a metallic wiring, to gates of the protective transistors, is made shorter than a corresponding distance in an output transistor or a protective transistor provided for an input terminal.