US Patent 7349276 Readout circuit and nonvolatile semiconductor memory device

A readout circuit has: a sense amplifier circuit configured to sense a data stored in a memory cell transistor based on a current flowing through the memory cell transistor and a reference current flowing through a dummy cell transistor; and a voltage control circuit configured to apply a first voltage to a gate of the dummy cell transistor in a read operation. The memory cell transistor has a control gate and a floating gate. The voltage control circuit sets the first voltage such that a voltage between the gate and a source of the dummy cell transistor is lower than a voltage between the control gate and a source of the memory cell transistor.