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US Patent 7326606 Semiconductor processing methods

Patent 7326606 was granted and assigned to Micron Technology on February, 2008 by the United States Patent and Trademark Office.

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Patent attributes

Current Assignee
Micron Technology
Micron Technology
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7326606
Date of Patent
February 5, 2008
Patent Application Number
10678513
Date Filed
October 3, 2003
Patent Primary Examiner
‌
Brook Kebede
Patent abstract

In one aspect, the invention provides a method of forming a contact opening to a conductive line. In one preferred implementation, a contact opening is formed to a conductive line which overlies a substrate isolation area with an etch which also outwardly exposes substrate active area to accommodate source/drain doping. In another preferred implementation, desired PMOS regions over a substrate into which p-type impurity is to be provided are exposed while a contact opening is contemporaneously formed to at least one conductive line extending over substrate isolation oxide. In another preferred implementation, a contact opening to a conductive line over a substrate and an opening to a laterally spaced substrate active area are formed in a common masking step. In another preferred implementation, desired PMOS active areas over a substrate are exposed and p-type impurity to a first concentration is provided into desired exposed areas. A masking layer is formed over the substrate and subsequently patterned and etched to form openings over source/drain regions. P-type impurity is provided through the openings into the source/drain regions to a second concentration which is greater than the first concentration.

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