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US Patent 7321164 Stack structure with semiconductor chip embedded in carrier

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Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7321164
Date of Patent
January 22, 2008
Patent Application Number
11294842
Date Filed
December 5, 2005
Patent Citations Received
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US Patent 12087679 Package core assembly and fabrication methods
0
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US Patent RE49987 Multiple plated via arrays of different wire heights on a same substrate
0
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US Patent 12027481 Device including semiconductor chips and method for producing such device
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0
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US Patent 11676832 Laser ablation system for package fabrication
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US Patent 11705365 Methods of micro-via formation for advanced packaging
0
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US Patent 11715700 Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration
0
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US Patent 11837680 Substrate structuring methods
0
...
Patent Primary Examiner
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Jasmine Clark
Patent abstract

A stack structure with semiconductor chips embedded in carriers comprises two carriers stacking together as a whole, at least two semiconductor chips having active surfaces with electrode pads and inactive surfaces corresponding thereto placed in the cavities of the carriers, at least one dielectric layer formed on the active surface of the semiconductor chip and the surface of the carrier, at least a conductive structure formed in the opening of the dielectric layer, and at least a circuit layer formed on the surface of the dielectric layer wherein the circuit layer is electrically connected to the electrode pad by the conductive structure, so as to form a three-dimensional module to increase the storage capacity dramatically and integrate the semiconductor chips in the carriers for efficiently reducing the size of the module, so that the combinations can be changed flexibly to form the required storage capacity according to the demands.

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