Patent attributes
It is an object to provide technique for forming a further minute gate electrode in a semiconductor integrated circuit. According to the present invention, a conductive film is etched while a resist mask is made to recede so as to make a cross section of a gate wiring have a trapezoidal shape having a width capable of being electrically connected to an upper layer wiring and make a cross section of a gate electrode, which diverges from a gate wiring, have a shape comprising only three interior angles, typically a triangular shape; and thus, a gate width of 1 μm or less is realized. According to the invention, increase of ON current is realized and a circuit operating at high speed (typically, a CMOS circuit or an NMOS circuit) can be obtained.
