US Patent 7313038 Nonvolatile memory including a verify circuit

A semiconductor device includes a first nonvolatile memory element group which includes a plurality of first nonvolatile memory elements programmed with data by electrically and irreversibly varying device characteristics, a verify circuit which detects a defective first nonvolatile memory element in the first nonvolatile memory element group, and a second nonvolatile memory element group which includes a plurality of second nonvolatile memory elements programmed with data by electrically and irreversibly varying device characteristics and which stores address data to rescue the defective first nonvolatile memory element.