Is a
Patent attributes
Patent Jurisdiction
Patent Number
Date of Patent
December 11, 2007
Patent Application Number
10063495
Date Filed
April 30, 2002
Patent Citations Received
Patent Primary Examiner
Patent abstract
A BIST system that utilizes ECC to correct single bit errors in a given memory word at a given address, the ECC having a maximum number of bit errors it can correct in the given memory word. A first set of gates is coupled to an array of memory cells that stores a plurality of memory words, each at a given address. The first set of gates provides bit outputs indicative of errors in a given memory word while the given memory word is under test. A circuit coupled to respective outputs of the first set of gates determines if a number of errors in the memory word under test exceeds the maximum number of errors correctable by the ECC.
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