Patent attributes
A method of manufacturing a multi-substrate semiconductor package. The method includes providing a first substrate with a plurality of first dies present thereon and forming a plurality of electrical contacts on an upper surface of a lateral extension portion of at least one of the plurality of first dies on the first substrate. The method also includes providing a second substrate, the second substrate comprising a plurality of second dies, at least one of the plurality of second dies comprising an interconnect region. Further, the method includes forming a sandwich structure by bonding the second substrate to an upper surface of the first substrate to form an intermediate level within the sandwich structure and separating the dies. The method also includes coupling an electrically conductive structure through the interconnect region of the one second dies to the lateral extension portion of the one first die.
