Patent attributes
The present invention proposes a multi-port memory device for preventing a degradation of a global data drive efficiency by turning off the switches which do not discharge a global data bus. The multi-port memory device includes a global data bus containing a plurality of bus lines; a plurality of banks including a transmitter and a receiver for exchanging a data with the global data bus; a plurality of ports including the transmitter and the receiver; a plurality of switches for selectively connecting the transmitter and the receiver with the global data bus; and a switching controller for generating a switch signal in response to a drive pulse and a data signal inputted to the transmitter, wherein the switch signal turns off the switches corresponding to the banks which are not discharging the global data bus.
