Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Hideo Hamaguchi0
Norihide Kinugasa0
Yoshio Nirasawa0
Date of Patent
August 28, 2007
0Patent Application Number
108912300
Date Filed
July 15, 2004
0Patent Primary Examiner
Patent abstract
A power-on reset circuit of the present invention comprises: a first p-channel MOS transistor having the gate and the drain which are grounded and having a substrate which is connected to a power supply; a first resistor which is inserted and connected between the above-mentioned power supply and the source of the above-mentioned first p-channel MOS transistor; a first inverter having an input terminal which is connected to the source of the first p-channel MOS transistor; and a power-on reset signal output terminal which is connected to an output terminal of the first inverter.
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