Patent attributes
A cyclic pipeline analog to digital converter includes a sample/hold module, a sub-analog/digital converting module, and an alternate digital/analog converting module. The sample/hold module generates a sample signal according to an analog-input signal and a residue signal. The sub-analog/digital converting module generates a first control signal and a second control signal alternately in different time according to the converting result of the sample signal. The alternate digital/analog converting module decides to receive a first reference signal and a second reference signal separately according to the first control signal and the second control signal. The alternate digital/analog converting module generates a first transfer signal according to at least the sample signal among the sample signal, the first reference signal and a first feedback signal, and generates a second transfer signal according to at least the sample signal among the sample signal, the second reference signal and a first feedback signal. The alternate digital/analog converting module generates the first feedback signal and the residue signal according to one of the first transfer signal and the second transfer signal.
