Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Bin Wang0
Chih-Hsin Wang0
William T. Colleran0
Date of Patent
August 14, 2007
0Patent Application Number
110842140
Date Filed
March 17, 2005
0Patent Primary Examiner
Patent abstract
NVM arrays include rows and columns of NVM cells comprising a floating gate, dual transistor, inverter storage element. Supply voltage for selected storage elements is turned off during a programming and an erase mode. Isolation transistors for each NVM cell or for each row of NVM cells may be used to control the supply voltage.
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