Patent 7248199 was granted and assigned to Sanyo on July, 2007 by the United States Patent and Trademark Office.
In an analog-to-digital (A-D) converter, an A-D conversion circuit samples an analog signal and converts it to a digital value of a predetermined bit number less than a targeted bit number. An amplifier circuit is provided in parallel to the A-D conversion circuit, and holds the signal sampled by the A-D conversion circuit or amplifies it by a predetermined gain. A first source follower circuit for the amplifier circuit and a second source follower circuit for the A-D conversion circuit are provided separately at the output side of a sample-and-hold circuit.