US Patent 7241693 Processing method for protection of backside of a wafer

Patent 7241693 was granted and assigned to Macronix on July, 2007 by the United States Patent and Trademark Office.

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Is a

Patent

Patent attributes

Current Assignee

Macronix

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

7241693

Date of Patent

July 10, 2007

Patent Application Number

11107885

Date Filed

April 18, 2005

Patent Primary Examiner

‌

NIkita Wells

Patent abstract

A temporal protection layer is employed to a wafer backside for use of micro-electro-mechanical systems (MEMS). The formation of the temporal protection layer prevents the wafer backside from scratch in process of transferring system for IC manufacturers. With regard to low cost and easy forming and removing, an oxide layer is used as the temporal protection layer. The throughput and yield rate of the wafer production are improved by the use of the temporal protection layer.