Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Jeffrey R. Rearick0
Xiaoyang Zhang0
Charles E. Moore0
Date of Patent
May 22, 2007
0Patent Application Number
106667700
Date Filed
September 17, 2003
0Patent Primary Examiner
Patent abstract
Disclosed is a Boundary-Scan test receiver for capturing signals during board interconnect testing. The test receiver has a comparator with a first input to receive signals during board interconnect testing, and a second input to receive a reference voltage. A programmable hysteresis circuit is coupled to at least one of the comparator's inputs. The programmable hysteresis circuit may be configured to program a hysteresis voltage and/or a hysteresis delay, both of which help prevent the comparator from integrating signal noise.
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