US Patent 7218254 Balanced disparity channel code for DC control

A coder is fed with precoded data such that the absolute value of the running digital sum (RDS) of the code words as produced by the coder is limited. This is achieved by ensuring that in a group of 2 code words, the RDS of the first code word is compensated by the RDS of the second code word. The RDS at the end of the second code word is then zero and the excursions of the RDS from the start of the first code word until the end of the second code word are limited because there are only a limited number of bits that can contribute to an increase of the absolute value of the RDS.