US Patent 7185120 Apparatus for period promotion avoidance for hubs

Patent 7185120 was granted and assigned to Intel on February, 2007 by the United States Patent and Trademark Office.

Overview Structured Data Issues Contributors Activity

Is a

Patent

Patent attributes

Current Assignee

Intel

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

7185120

Patent Inventor Names

John I. Garney0

Brian A. Leete0

Date of Patent

February 27, 2007

Patent Application Number

10726363

Date Filed

December 2, 2003

Patent Primary Examiner

‌

Fritz Fleming

Patent abstract

A device is presented including a host controller capable of attaching a quantity of queue heads to a frame list. The quantity of queue heads are attached to the frame list before any transaction descriptors where split-isochronous transaction descriptors are supported.