Patent attributes
A multi-path digital power supply controller includes a first ADC (ADC1) coupled to the supply's output voltage Vout and arranged to provide an output which varies with Vout's low frequency components, and a second ADC (ADC2) coupled to Vout and arranged to provide an output which varies with Vout's high frequency components. A digital reference value is subtracted from the output of ADC1 to produce a low frequency digital error signal, and a summing circuit sums the low frequency digital error signal and the output of ADC2. Processing circuitry is arranged to produce an output which varies with the summed signal and is suitable for coupling to a power stage for use in regulating Vout. Preferably, ADC1 is a low-bandwidth high-resolution ADC and ADC2 is a high-bandwidth low-resolution ADC, both of which are low-cost components.
