US Patent 7180341 Variable division method and variable divider

A feedback path (307) is formed between an output (310c) of a fixed divider (305) and a control terminal (310b) of an inverting/noninverting unit (304). A connection device (306) is arranged on the feedback path (307). The feedback path (307) is connected/disconnected according to the level of the control signal M from outside, thereby switching the number of divisions. The delay time of the signal given to the input terminal (310a) of the inverting/noninverting unit (304) to pass through the feedback path (307) and return to the control terminal (310b) is set greater than the pulse width of the input clock signal. A small pulse input invalidating function is provided in the fixed divider (305). Alternatively, a small pulse output prohibiting function is provided in the inverting/noninverting unit (304). The fixed divider (305) divides the clock signal before division from the inverting/noninverting unit (304) according to the leading edge of the clock pulse of the normal pulse width in the signal (a change point corresponding to the leading edge of the input clock signal).