Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Garnik Taheri0
Date of Patent
February 20, 2007
Patent Application Number
10754807
Date Filed
January 8, 2004
Patent Primary Examiner
Patent abstract
A multilayer printed circuit board (PCB) interface includes a top PCB layer, a middle PCB layer, and a bottom PCB layer. A top surface of the top PCB layer receives at least one top module. The middle PCB layer includes an electrically conductive layer disposed between two dielectric layers. The electrically conductive layer forms a plurality of connectors protruding horizontally from the sides of the multilayer PCB to couple the PCB interface to a main board. A bottom surface of the bottom PCB layer receives at least one bottom module.
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