Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
February 20, 2007
Patent Application Number
11091722
Date Filed
March 28, 2005
Patent Primary Examiner
Patent abstract
A technique for forming Charge-Coupled Devices (CCDs) in a conventional Complementary Metal Oxide Semiconductor (CMOS) process. A number of single-layer polysilicon gates are formed on an as-grown, native doped silicon substrate, with gaps between them. Masking is used to selectively dope the gates while preventing doping of the silicon in the gaps. Masking may likewise be used to selectively silicide the gates while preventing silicide formation in the gaps. Conventional source-drain processing produces input/output diffusions for the CCD.
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