US Patent 7170331 Delay circuit

Patent 7170331 was granted and assigned to Sanyo on January, 2007 by the United States Patent and Trademark Office.

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Patent Inventor Names

Koji Hayashi0

Toshiyuki Shutoku0

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Patent abstract

A delay circuit comprising a delay line to delay an input signal that has a plurality of delay cells connected in series; a PLL circuit that supplies the delay line with a delay control voltage to control the delay; and a first selector that selects one of output signals of the delay cells.

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Official Website

https://pdfpiw.uspto.gov/.piw?Docid=07170331

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