US Patent 7170323 Delay locked loop harmonic detector and associated method

We describe and claim a delay locked loop harmonic detector and associated method. A delay locked loop includes a detection circuit to generate a detection signal responsive to an input clock and a control circuit to synchronize the delay locked loop to a fundamental of the input clock responsive to the detection signal. A method includes detecting harmonic synchronization in a delay locked loop responsive to an input clock and locking the delay locked loop to a fundamental of the input clock responsive to the detecting.