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US Patent 7163421 High speed high density electrical connector

Patent 7163421 was granted and assigned to Amphenol on January, 2007 by the United States Patent and Trademark Office.

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Is a
Patent
Patent

Patent attributes

Current Assignee
Amphenol
Amphenol
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7163421
Date of Patent
January 16, 2007
Patent Application Number
11183564
Date Filed
July 18, 2005
Patent Citations Received
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US Patent 12095187 Robust, miniaturized card edge connector
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US Patent 11942724 Electrical connector having symmetrical docking holes
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US Patent 11950356 Mating backplane for high speed, high density electrical connector
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US Patent 11955742 Electrical connector with cavity between terminals
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US Patent 11710917 Low crosstalk card edge connector
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US Patent 11715914 High speed, high density electrical connector with shielded signal paths
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US Patent 11757215 High speed electrical connector and printed circuit board thereof
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US Patent 11757224 High performance cable connector
...
Patent Primary Examiner
‌
Tho D. Ta
Patent abstract

An electrical connector includes a wafer formed with a ground shield made from a non-conductive material made conductive with conductive particles disposed therein, thereby eliminating the necessity of the metal ground shield plate found in prior art connectors while maintaining sufficient performance characteristics and minimizing electrical noise generated in the wafer. The wafer housing is formed with a first, insulative housing at least partially surrounding a pair of signal strips and a second, conductive housing at least partially surrounding the first, insulative housing and the signal strips. The housings provide the wafer with sufficient structural integrity, obviating the need for additional support structures or components for a wafer. Ground strips may be employed in the wafer and may be formed in the same plane as the signal strips. The second, conductive housing may be connected (e.g., molded) to the ground strips and spaced appropriately from the signal strips. The wafer may also include air gaps between the signal strips of one wafer and the conductive housing of an adjacent wafer further reducing electrical noise or other losses (e.g., cross-talk) without sacrificing significant signal strength.

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