Patent attributes
A chopper-stabilized current mirror includes a pair of FETs connected to mirror an input current Iin. In one embodiment, switching networks S1 and S2 have their respective inputs connected to the FETs' drains, and are operated with clock signals CLK1 and CLK2, respectively. An ro boost amplifier A1 has its inputs connected to the outputs of S2 and its outputs connected to the gates of a pair of cascode FETs via a switching network S3 which is operated with clock signal CLK2S, with the drain of one cascode FET connected to Iin and the drain of the other providing the mirror's output Iout. S1 is clocked to reduce mismatch errors and S2 and S3 are clocked to reduce errors due to A1's offset voltage, with CLK2 and CLK2S shifted with respect to CLK1 to reduce errors due to parasitic capacitances.
