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Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Toshihiro Terazawa0
Date of Patent
December 19, 2006
0Patent Application Number
107612860
Date Filed
January 22, 2004
0Patent Primary Examiner
Patent abstract
The scan test circuit according to one embodiment of the present invention includes a noninversion/inversion control circuit inserted and connected between a sequential circuit and a combinational circuit included in a path to be subjected to a scan test, the noninversion/inversion control circuit not inverting or inverting scan data output from the sequential circuit, on outside of said sequential circuit at arbitrary timing.
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