US Patent 7137022 Timing adjustment circuit and semiconductor device including the same

In order to compare a phase of an internal clock signal outputted from a clock driver with that of a data strobe signal from a data strobe output circuit driven by the internal clock signal, a selector is disposed to supply a data strobe signal instead of an external clock signal inputted into a phase comparison circuit. While the selector selects the data strobe signal, the selector, a replica circuit, and the phase comparison circuit operate as a phase advance/delay signal generation circuit to output a phase advance/delay signal indicating a timing deviation to an external output terminal.