US Patent 7117306 Mitigating access penalty of a semiconductor nonvolatile memory

Adding a nonvolatile storage (e.g., a cache) to an associated memory array within a semiconductor nonvolatile memory may mitigate the access penalty that occurs in semiconductor nonvolatile memories, such as flash memories and flash devices. For example, in response to a memory access request, the cache may be accessed for data before accessing the memory array and the data may be selectively stored from the memory array into the cache. In another embodiment, an asynchronous access to a semiconductor nonvolatile memory may be converted into a synchronous access.