Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Masaru Kubota0
Kazunori Matsuzawa0
Kimio Yoshimi0
Kiyoshi Obikata0
Geliang Shao0
Date of Patent
September 26, 2006
0Patent Application Number
110933320
Date Filed
March 29, 2005
0Patent Primary Examiner
Patent abstract
In charging a gate of a NMOS transistor Q1, the charging speed is adjustable by varying a resistor R1. When an inputted pulse signal VIN reverses to a negative voltage, a diode D2 turns off. Then, current flows along a discharging loop formed by the gate capacitor, the resistor R1, the emitter of the transistor Q2, the base of the transistor Q2, the resistor R2 and the capacitor C1, the transformer T1 and the source of the NMOS transistor Q1. A reverse bias voltage is applied to the gate of the NMOS transistor Q1, thereby keeping the NMOS transistor Q1off-state stably.
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