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US Patent 7091589 Multilayer wiring board and manufacture method thereof

Patent 7091589 was granted and assigned to Dai Nippon Printing on August, 2006 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Current Assignee
Dai Nippon Printing
Dai Nippon Printing
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Date Filed
December 10, 2003
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Date of Patent
August 15, 2006
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Patent Application Number
10497536
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Patent Citations Received
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US Patent 12087679 Package core assembly and fabrication methods
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US Patent 12062618 Chip package
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US Patent 11676832 Laser ablation system for package fabrication
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US Patent 11705365 Methods of micro-via formation for advanced packaging
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US Patent 11715700 Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration
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US Patent 11881447 Package core assembly and fabrication methods
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US Patent 11862546 Package core assembly and fabrication methods
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US Patent 11887934 Package structure and fabrication methods
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US Patent 11894306 Chip package
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US Patent 11927885 Fluoropolymer stamp fabrication method
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•••
Patent Inventor Names
Koichi Nakayama
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Kazunori Nakamura
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Miyuki Akazawa
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Satoru Kuramochi
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Toshiaki Mori
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
7091589
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Patent Primary Examiner
Douglas W Owens
Douglas W Owens
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