Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Daniel P. O'Connor0
Edward R. Pillai0
Warren D. Dyckman0
Date of Patent
August 1, 2006
0Patent Application Number
109086940
Date Filed
May 23, 2005
0Patent Citations Received
Patent Primary Examiner
Patent abstract
Disclosed is a method and structure for locally powering a semiconductor chip within a package. The structure and method incorporate a local voltage regulator mounted adjacent a semiconductor chip on a top surface of a carrier. The voltage regulator is electrically connected to a power plane disposed within the carrier. The voltage regulator continuously senses the reflected voltage of the power plane at a regulated output port and actively cancels time domain noise within its operational bandwidth. Mounting the voltage regulator on top of the carrier adjacent to the chip minimizes loop inductance between the regulator and power plane and also minimizes delay caused by impedance of the power plane on the current flowing to the chip.
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