Is a
Patent attributes
Patent Applicant
0
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Asher Hazanchuk0
Benjamin Esposito0
Date of Patent
September 13, 2005
0Patent Application Number
106684490
Date Filed
September 22, 2003
0Patent Citations Received
0
...
Patent Primary Examiner
Patent abstract
A programmable logic device includes at least one RAM block generating a first multi-bit calculation result which may, but does not necessarily, involve a multiplication of two operands. A shift operation is driven by a second multi-bit calculation result shifts the second multi-bit calculation result by at least one bit to generate a shifted second multi-bit calculation result. A multi-bit adder coupled to the at least one RAM block adds the shifted second multi-bit calculation result to the first multi-bit calculation result.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.