US Patent 6897525 Semiconductor device and method of manufacturing the same

In order to improve the characteristics of the high breakdown voltage MOS, a semiconductor device of the present invention is characterized in that an LDMOS transistor, which comprises a source region 4, a channel region 8, and a drain region 5, and a gate electrode 7 formed on the channel region 8, and a drift region formed between the channel region 8 and the drain region 5, wherein an N−-type low concentration layer 22 serving as the drift region is formed shallowly at least below the gate electrode 7 (first N−-type layer 22A) but formed deeply in a neighborhood of the drain region 5 (second N−-type layer 22B).