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US Patent 12081649 Error resilient cryptographic units and methods

Patent 12081649 was granted and assigned to Intel on September, 2024 by the United States Patent and Trademark Office.

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Contents

Is a
Patent
Patent
0

Patent attributes

Patent Applicant
Intel
Intel
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Current Assignee
Intel
Intel
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
120816490
Patent Inventor Names
Vinodh Gopal0
Kirk Yap0
Date of Patent
September 3, 2024
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Patent Application Number
170105770
Date Filed
September 2, 2020
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Patent Citations
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US Patent 10657071 System, apparatus and method for page granular, software controlled multiple key memory encryption
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US Patent 10594491 Cryptographic system memory management
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US Patent 9524249 Memory encryption engine integration
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US Patent 9614666 Encryption interface
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US Patent 9792229 Protecting a memory
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US Patent 9893881 Efficient sharing of hardware encryption pipeline for multiple security solutions
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US Patent 10303899 Secure public cloud with protected guest-verified host control
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Patent Primary Examiner
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Malcolm Cribbs
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CPC Code
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H04L 63/123
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G06F 11/0772
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G06F 11/1004
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G06F 11/1044
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G06F 21/64
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G06F 21/645
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H04L 63/12
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H04L 9/3242
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...
Patent abstract

An apparatus of an aspect includes an encryption unit to receive unencrypted data. The encryption unit is to encrypt the unencrypted data to generate encrypted data. The apparatus also includes circuitry coupled with the encryption unit. The circuitry is to generate a first checksum for a copy of the unencrypted data, generate a second checksum for a copy of the encrypted data, and combine the first and second checksums to generate a first value.

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