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US Patent 12081211 High power positive logic switch

Patent 12081211 was granted and assigned to pSemi on September, 2024 by the United States Patent and Trademark Office.

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Contents

Is a
Patent
Patent
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Patent attributes

Patent Applicant
pSemi
pSemi
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Current Assignee
pSemi
pSemi
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
120812110
Patent Inventor Names
Payman Shanjani0
Date of Patent
September 3, 2024
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Patent Application Number
179645240
Date Filed
October 12, 2022
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Patent Citations
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US Patent 6897701 Method and structure for improving the linearity of MOS switches
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US Patent 6898778 Semiconductor integrated circuit and method of manufacturing the same
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US Patent 6901023 Word line driver for negative voltage
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US Patent 6903596 Method and system for impedance matched switching
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US Patent 6908832 In situ plasma wafer bonding method
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US Patent 6917258 High frequency switch
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US Patent 6933744 Low-leakage integrated circuits and dynamic logic circuits
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US Patent 6947720 Low noise mixer circuit with improved gain
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Patent Primary Examiner
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Long Nguyen
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CPC Code
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H03K 17/04106
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H03K 17/063
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H03K 17/08104
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H03K 17/102
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H03K 17/122
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H03K 17/133
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H03K 17/161
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H03K 17/687
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Patent abstract

A positive-logic FET switch stack that does not require a negative bias voltage, and which can withstand application of a high voltage RF signal without requiring terminal capacitors. Some embodiments include a stack of FET switches, with at least one FET requiring a negative V

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