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US Patent 12062618 Chip package
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Is a
Patent
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Date Filed
November 30, 2023
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Date of Patent
August 13, 2024
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Patent Application Number
18524118
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Patent Citations
US Patent 9385105 Semiconductor devices
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US Patent 10192796 Semiconductor device and method of forming dual-sided interconnect structures in FO-WLCSP
0
US Patent 10490521 Advanced structure for info wafer warpage reduction
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US Patent 11538763 Chip package
0
US Patent 11894306 Chip package
0
US Patent 6839946 Method for fabricating a thin film bulk acoustic wave resonator (FBAR) on a glass substrate
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US Patent 6894358 Process for producing microelectromechanical components and a housed microelectromechanical component
0
US Patent 6989604 Conformal barrier liner in an integrated circuit interconnect
0
US Patent 7019406 Thermally enhanced semiconductor package
0
US Patent 7038309 Chip package structure with glass substrate
0
•••
Patent Inventor Names
Ping-Jung Yang
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Patent Jurisdiction
United States Patent and Trademark Office
0
Patent Number
12062618
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Patent Primary Examiner
Xiaoming Liu
0
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