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US Patent 12001375 Interconnect system
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Is a
Patent
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Date Filed
November 10, 2021
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Date of Patent
June 4, 2024
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Patent Application Number
17523049
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Patent Citations
US Patent 11526460 Multi-chip processing system and method for adding routing path information into headers of packets
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US Patent 10505851 Transmission burst control in a network device
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US Patent 11569939 Synchronizing a high-speed signaling interconnect
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US Patent 9929928 Packet transmitter and method for timestamping packets
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US Patent 10339059 Global socket to socket cache coherence architecture
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Patent Inventor Names
Xuemin Zhang
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Yang Shi
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Chen Chen
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Xiaoliang Kang
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Weilin Wang
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
12001375
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Patent Primary Examiner
Nimesh G Patel
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CPC Code
H04L 45/22
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H04L 45/42
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H04L 45/745
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H04L 69/324
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H04L 45/02
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H04L 1/004
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G06F 13/4282
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G06F 13/4208
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G06F 13/1668
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G06F 13/4027
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