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US Patent 11947796 Memory protocol

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Contents

Is a
Patent
Patent
0

Patent attributes

Patent Applicant
Micron Technology
Micron Technology
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
119477960
Patent Inventor Names
Robert M. Walker0
James A. Hall, Jr.0
Date of Patent
April 2, 2024
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Patent Application Number
177498010
Date Filed
May 20, 2022
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Patent Citations
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US Patent 7870351 System, apparatus, and method for modifying the order of memory accesses
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US Patent 7983107 Flash backed DRAM module with a selectable number of flash chips
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US Patent 8504728 Network interface with secondary data and packet information storage and memory control systems to accommodate out-of-order data processing and split transactions on a host system bus
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US Patent 8719492 Non-volatile storage module having magnetic random access memory (MRAM) with a buffer window
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US Patent 8769192 Data read method for a plurality of host read commands, and flash memory controller and storage system using the same
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US Patent 8874831 Flash-DRAM hybrid memory module
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US Patent 9104583 On demand allocation of cache buffer slots
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US Patent 9128634 Systems and methods of packed command management for non-volatile storage devices
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Patent Primary Examiner
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Prasith Thammavong
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CPC Code
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G06F 3/0685
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G06F 12/0246
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G06F 2212/261
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G06F 3/0659
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G06F 2212/7207
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G06F 3/0656
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G06F 3/0605
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G06F 2212/7203
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Patent abstract

The present disclosure includes apparatuses and methods related to a memory protocol. An example apparatus can perform operations on a number of block buffers of the memory device based on commands received from a host using a block configuration register, wherein the operations can read data from the number of block buffers and write data to the number of block buffers on the memory device.

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